What this error means

For every net, ERC looks up each pair of pins in the Pin Conflicts Map (Schematic Setup → Electrical Rules → Pin Conflicts Map), a matrix with one cell per combination of electrical types. Any pair whose cell is not OK produces this violation, reported at runtime as "Pins of type X and Y are connected."

The default matrix errors on driver-versus-driver pairs: Output against Output, Output against Power output, Power output against Power output, and push-pull drivers against Open collector or Open emitter. A pin whose type is Unconnected errors against everything the moment it joins a net. Most pairs involving an Unspecified pin produce the warning-level version instead. Pins stacked in the same symbol (same position, name, and type) are exempt.

Common causes

1. A PWR_FLAG or power symbol landed on a net that already has a driver

The most common case. A regulator's output pin is typed Power output (or Output), and adding a PWR_FLAG — itself a Power output pin — creates two drivers. Same story when USB VBUS and a regulator output share a net. PWR_FLAG is only for nets with no driver at all; on a driven net it causes the exact error it usually cures.

2. A symbol pin has the wrong electrical type

Vendor-supplied and hand-drawn symbols regularly mistype pins: a supply output typed Output instead of Power output, an open-emitter comparator output typed push-pull, or a spare pin typed Unconnected that then gets wired. The connection is fine; the declared type is lying about the silicon.

3. Two push-pull outputs are genuinely shorted

The case the check exists for. Two totem-pole outputs on one net will fight, and the loser overheats. Shared buses are built from open-collector, open-drain, or three-state pins, which the default matrix allows to share a net.

How to fix it

Remove the extra driver from the net

  1. Read the two @-position lines under the marker — they name both conflicting pins.
  2. If one is a PWR_FLAG on a net a regulator or supply pin already drives, delete the flag.
  3. Re-run ERC (Inspect → Electrical Rules Checker).

Use when: The net has a real driver plus a PWR_FLAG or second supply. One driver per net; flags belong only on rails fed from off-schematic.

Correct the pin's electrical type in the Symbol Editor

  1. Right-click the symbol → Edit Symbol.
  2. Double-click the offending pin and set Electrical type to what the pin actually is: Power output for a regulator output, Open collector for an open-drain driver, Passive for a connector contact.
  3. Save, update the symbol in the schematic, and re-run ERC.

Use when: The declared type is wrong — typical for downloaded vendor symbols. Fix your own copies; for stock KiCad library symbols, report the bug rather than editing in place.

Exclude the violation, or edit the Pin Conflicts Map

  1. Right-click the marker → Exclude this violation for a one-off.
  2. For a combination your designs use routinely, click the cell in Schematic Setup → Electrical Rules → Pin Conflicts Map to cycle it between error, warning, and no error.

Use when: The topology is intentional — power ORing through an ideal-diode controller, wired-OR with series resistors — and the pin types are already honest.

When it’s safe to exclude

Excluding a single violation is legitimate more often here than for most ERC checks, because real topologies do put two drivers on one net: ideal-diode power ORing, backfeed-protected dual supplies, wired-OR buses with series resistors. For those, right-click the marker and pick Exclude this violation.

Everywhere else the check is catching bus contention that cooks output stages, or supplies fighting through milliohms of copper. So exclude the instance you have verified, not the check: matrix edits apply to the whole project, and setting this check to Ignore in Schematic Setup → Electrical Rules → Violation Severity silences every pin-type conflict at once, error-level ones included (see gotchas).

Gotchas

  • The Violation Severity list has one row for this check, and it only controls ignore-or-not. Set it to Ignore and the error-level conflicts (shorted outputs included) vanish along with the warnings. The warning/error split lives in the Pin Conflicts Map, not the severity list.
  • A pin typed Unconnected is not a no-connect flag. The type says "never wire this," so wiring it errors against any other pin; the blue X flag marks an unwired pin as intentionally unwired. Vendor symbols that type spare pins Unconnected bite the day you reuse one.
  • One marker can stand for several conflicts. ERC reports the pin with the most mismatches against its nearest offender, so fixing one pair and re-running can surface another. Recount after every fix.
Minimal reproduction

Place two logic gates, wire their outputs to the same net, and run ERC (Inspect → Electrical Rules Checker). The report shows:

[pin_to_pin]: Pins of type Output and Output are connected
    ; error

The checked-in file data/erc/samples/pin_to_pin.kicad_sch reproduces this with two embedded one-pin Output symbols joined by one wire, so the conflict is the only error. The two lib_symbol_issues warnings about the missing repro library are an artifact of the self-contained file. Retyping either pin as Input (the pin-type fix in miniature) or Passive (a driver plus a load) drops the error count to zero on both KiCad 9 and 10.

FAQ

I added a PWR_FLAG and now ERC says pins of type Output and Power output are connected. Why?

The net already had a driver. PWR_FLAG connects through a Power output pin, and the default rules error when that meets a pin typed Output or another Power output. The flag is only for nets nothing on the schematic drives. Delete it from driven nets.

USB VBUS and my regulator output ended up on the same net. How do I fix 'Power output and Power output are connected'?

First check whether they should share a net at all — if a power mux or ideal-diode controller sits between them, the schematic is miswired. If the design really ties them together and the hardware tolerates it, right-click the marker and exclude that one violation.

Can two outputs be connected together at all, like on a shared bus?

Not push-pull outputs — when one drives high and the other low, the short flows through both output stages. Shared lines use open-collector, open-drain, or three-state pins, which the default rules allow to share a net. If the silicon really is open-drain, retype the pin instead of excluding the error.

Can I change which pin combinations count as errors?

Yes. Schematic Setup → Electrical Rules → Pin Conflicts Map is a per-project matrix; clicking a cell cycles it between no error, warning, and error. Changes apply to every net in the project, so prefer a per-violation exclusion for one-off cases.

Sources